Generation of Data Paths in Synthetic Circuits
Hi all,
I was rooting around my old files today and I found my undergraduate thesis. A quick search on Google found very little mention of it and no copies of it at all. In an effort to share my research with the world, here it is:
Generation of Data Paths in Synthetic Circuits
The idea, for those who care, is to generate electronic circuits that have desirable characteristics. In addition the project can extract those characteristics from existing designs. The hope was you'd be able to say "I want to test on a design like this one, but a little bigger" and my program would magically make it so.
Of course it turned out to be far more difficult than I anticipated, and while the resulting design tended to exhibit the requested characteristics, in many other ways it came across as very artificial.
Ta Da, my contribution to the world of academia. Enjoy if you're into VHDL hardware design... or if you're really bored/insomniac.
I was rooting around my old files today and I found my undergraduate thesis. A quick search on Google found very little mention of it and no copies of it at all. In an effort to share my research with the world, here it is:
Generation of Data Paths in Synthetic Circuits
The idea, for those who care, is to generate electronic circuits that have desirable characteristics. In addition the project can extract those characteristics from existing designs. The hope was you'd be able to say "I want to test on a design like this one, but a little bigger" and my program would magically make it so.
Of course it turned out to be far more difficult than I anticipated, and while the resulting design tended to exhibit the requested characteristics, in many other ways it came across as very artificial.
Ta Da, my contribution to the world of academia. Enjoy if you're into VHDL hardware design... or if you're really bored/insomniac.
posted by Ze Ace at
10:41 PM
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1 comments
